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recent projects
        

AGI Industrial Start Up Projects

 

Project / Location

Date

Scope of Work

 

 

 

Confidential Client

San Jose, CA

2005 – 2006

MEMS Display Start Up Consulting

          Facility/Tool Install Design Review

          Documentation and training of Fab and Assembly Processes, Facilities, Environmental Health and Safety, and Cleanroom Protocol.

          Acceptance testing of process equipment.

          Development of materials and supplies requirements.

          Capacity Modeling, Front End / Back End

 

Power Paper, Ltd.

Confidential Location

2005 – 2006

Manufacturability Study of Roll to Roll Process

         Flexible Electronic Product

         New Technology and Process Evaluation

         Review of Worldwide License Capabilities.

 

Mohawk Valley EDGE

New York

2004 – Present

Large Chip Fab Site

         Site Evaluation – Vibration / EMI / Traffic

         Optimize Site Layout

         Market Site to IC Manufacturers

         Wetlands Permit / Abatement Consulting

         Develop Local Support and Infrastructure

 

Saratoga Economic Development Corporation (SEDC) Luther Forest

Saratoga, NY

2002 – Present

Industry Requirements & Environmental Impact Study Report

         300mm Wafer Fab Benchmark Study to accommodate 4 fabs

         1000 Acre site for World’s Largest IC Manufacturers.

         Site Survey (EMI, Vibration, RF, Acoustic)

         Due Diligence Evaluation

         VIP and Community Education

 

N-trig, Ltd.

Tel-Aviv, Israel

2003

Magnetic Digitizer – Flexible Electronics

         Start-up Support

         Process Analysis

         Assist with the Commercialization of New Technology

         Device Cross Section

 

Motorola Life Sciences

Tempe, AZ

2001 – 2002

Bio Safety Lab (BLSII/III) Design and Construction

         Biochip Lab and Manufacturing Cleanroom Expansion

         Relocation Project Planning

         Tool List, CAD Footprints

         Utility Matrix

 

Rockwell Collins

Manchester, IA

2001

LCD Fab

         Renovation

         Programming, Design, Budgeting, Layout, Utility Matrix

 

Citala

Tel-Aviv, Israel

2001

New Flexible Display Fab

         Roll to Roll Processing

         Programming, Layout

         Tool Analysis

         Process Analysis

 

Atmel

Irving, TX

2001

Operating Fab Building Acquisition

         137,000 square foot Cleanroom

         Site Evaluations to accommodate 0.18 micron process

         Class 1 to Class 1,000

         Multi Level Fab, 2 Subfab Levels, Fan Deck, Ballroom

         Layout for 200mm Tools

         Utility Matrix

         Room Condition Evaluation

         Capacity Analysis

         HPM Analysis

 

Micron Technologies

Lehi, UT

2000 – 2001

300mm Wafer Fab DRAM

         Industrial Engineering

         Layout

         Utility Matrix

         Capacity Study

 

Amkor

Philippines

2000

High Volume Assembly and BGA Renovation

         Layout and Utility Matrix Consulting

         Utility Distribution Analysis

 

Philips Semiconductors

Albuquerque,

New Mexico

1999 – 2002

Operating Fab – Complete, Phased Renovation

         BiCMOS, 0.25 to 0.18 Micron, 150mm and 200mm Wafer Fabs

         SMIF Introduction

         75,000 Square Foot Renovation, including CMP Area

         Class 10 to Class 1,000

         Utility Matrix, Equipment and Room Layouts

         Vibration Analysis, Engineering Review, and Automation Plan

         Base Build Consulting Support

         HPM Analysis

 

Silterra

(fka Wafer Technology)

Kulim, Malaysia

 

 

1998 – 2002

Green Build Advanced CMOS, 200mm wafer fab, SMIF, 0.18 Micron

         Awarded Top Fabs of 2002 by Semiconductor International Magazine, May 2002

         Class 1 to Class 1,000 Environment

         Fan Deck, Cleanroom Raised Floor, Ballroom, Subfab

         Copper and CMP Processes

         Test and Failure Analysis

         Layout Development/Optimization

         Capacity Analysis

         Utility Matrix, Tool Comparison, HPM Analysis

         Automation Review

         Base Build Consulting Support

         EMI Evaluation for Characterization Areas

 

Siemens / Uniax

Cupertino, CA

1998

New OLED Manufacturing Process On Generation 2 Substrate

         Manufacturing Process Feasibility Study

         Cost analysis of current and proposed manufacturing processes

         Cost modeling of Start-Up over 5 year horizon

 

Texas Instruments

(fka Unitrode)

Merrimack, NH

1997-2000

150mm BiCMOS Wafers

         Fab Start-Up and Qualification

         Tool installation and acceptance

         Wafer process start-up, specifications and process development

         Etch, Diffusion, CVD

 

FlipChip Technologies

Phoenix, AZ

1996-1997

Bump Wafer Fab

         Tool Rigging

         Wall Reconfiguration

         Tool Positioning and Fit Up

 

Scitex Digital Printing

Dayton, OH

1996-1997

Digital Print Heads (High Speed)

         Process analysis, process tool selection and evaluation

         Layout review

         Conceptual design strategy

 

White Oak Semiconductor/DPR

VA

 

1996

200mm Wafer Fab

         Review of Conceptual Design

 

Eastman Kodak

Rochester, NY

1995 – 2006

 

OLED FPD Pilot Line

         Factory analysis, cost model, equipment specification, equipment procurement, layout, facility design and construction. Engineering support for R&D and pilot line facility.  Fit up support.

         Process specification development and outsourcing.

         Site selection factory model, conceptual design for pilot line scale-up.

         Color filter technology, process & cost analysis.

         Ongoing Process Engineering and Technology Transfer Support.

 

Microchip Technology

Chandler, AZ

France

 

1995

200mm Wafer Submicron CMOS

         Fab Layout

         Potential fab acquisition evaluation in France

 

Motorola

Mesa, AZ

 

1995

Bipolar 100mm, 150mm Wafers

         Site Renovation Plan

 

LSI Logic/ATA

Milpitas, CA

Gresham, OR

1995

200mm CMOS

         SMIF Wafer Fab Layout

         Capacity Analysis

         Modeling, Simulation, Automation and Utility Consulting

 

Hewlett Packard/IDC

Corvallis, OR

1993

200mm CMOS Wafer Fab

         Hi-Thruput Fab Facility

         Conceptual design, Mini-Environment, Automation, Layout, Utilities

 

OIS Optical Imaging Systems, Inc.

Northville, MI

 

1992 – 1996

AMLCD Pilot Demonstration Facility

         First in the USA.

         Conceptual Design, Bid Specs, Layout, Construction Management, Fit-Up design and supervision.

         Material Handling System Design – Front opening unified pod with minienvironment (KPODÔ).

 

Medtronic/Microrel

Tempe, AZ

1992 – 1994

Medical, Implantable Hybrids (Pacemakers)

         Start up of Tachy Manufacturing Line

         Renovation/validation, Process Equipment Engineering

         FDA Auditable

         Hybrid Design rule, Development

 

Delco Electronics/ Bump Fab

Kokomo, IN

 

1990-1991

Bump wafers – Automotive

         Bump Fab Phased Renovation of existing fab

         Conceptual design, layout, utility matrix

         Phase planning, management presentation

 

AIL Systems

Division of Eaton

Deer Park, NY

 

1990-1991

Hi-Rel Hybrids, SAW Devices, Si and GaAs Wafers

         Campus Consolidation of Fab, Assembly, and Test for Hi-Rel Devices and Hybrids.

 

Aerojet

Azusa, CA

 

1989

         GaAs/Si Military Fab, Assembly, Test.

 

 

ULVAC

Fremont, CA

1989

 

 

         Equipment Demo Lab.

 

GE Aerospace

Syracuse, NY

 

1988